没有公告
详细说明:VHDL编写的PCI代码,PCI2.2兼容,Xillinx Virtex与Spantan II 优化,33M主频,32位宽度,全目标功能等.
文件列表:
CFG_DECODE.vhd
CFG_FSM.vhd
cfg_regs.vhd
CFG_ROM.vhd
CFG_SPACE.vhd
core_set.vhd
EROM_IF.vhd
G_PARITY.vhd
PCIT_CORE.vhd
PCIT_DB.pdf
pci_app.vhd
PCI_CMDADR.vhd
PCI_IO_VIRTEX.vhd
TARGET_FSM.vhd
USER_ALU.vhd
USER_APP.vhd