Computer Organization and Architecture: Designing for Performance (Fifth Edition)
　　William Stallings. 2001.6出版，定价：41.00元
　　本书较为全面地论述了计算机组织与结构的基础原理，所讲述的内容与当前的一些实际设计问题联系密切。全书共分五大部分，包括绪论、计算机系统、通用处理单元、控制单元以及并行组织，附录包括数字逻辑、教学指导，书末附有词汇表、索引页。另外，每章均列有参考文献与Web站点，方便读者查询相关资料。考虑到计算机层次化的组织结构，本书在内容组织上也采用了同样的方式：计算机系统→处理器→控制单元。这种方式符合人们通常的思维习惯，便于读者理解和学习。本书为第五版，作者William Stallings在前几版的基础上做了大量的优化和改进，并增加了许多新的内容，诸如光存储器、超标量设计、多媒体指令集、同步多处理器等，体现了计算机组织结构发展的最新技术。
　　本书可作为电子、计算机专业本科和研究生的教材，也可供工程技术人员参考使用。
　　内容:1. 绪论（导言，计算机发展与性能）2. 计算机系统（系统总线，内部存储器，外部存储器，输入/输出系统，操作系统支持）3. 通用处理单元（计算机运算，指令集特性与功能，指令集编址模式，CPU结构与功能，精简指令集计算机，指令级并行与超标量处理机）4. 控制单元（控制单元操作，微程序控制）5. 并行组织（并行处理）附录A 数字逻辑 附录B 计算机组织与结构教学指导 词汇表 参考文献 索引

PREFACDE
OBJECTIVES
　　This book is about the structure and function of computers. Its purpose is to present, as clearly and completely as possible, the nature and characteristics of modern-day computer systems. 　　This task is challenging for several reasons. First, there is a tremendous variety of products that can rightly claim the name of “computer”, from single-chip microprocessors, costing a few dollars, to supercomputers. Costing tens of millions of dollars. Variety is exhibited not only in cost, but in size, performance, and application. Second, the rapid pace of change that has always characterized computer technology continues with no letup. These changes cover all aspects of computer technology, from the underlying integrated circuit technology used to construct computer components, to the increasing use of parallel organization concepts in combining those components.
　　In spite of the variety and pace of change in the computer field, certain fundamental concepts apply consistently throughout. The application of these concepts depends on the current state of the technology and the price/performance objectives of the designer. The intent of this book is to provide a thorough discussion of the fundamentals of computer organization and architecture and to relate these to contemporary design issues.
　　The subtitle suggest the theme and the approach taken in this book. It has always been important to design computer systems to achieve high performance, but never has this requirement been stronger or more difficult to satisfy than today. All of the basic performance characteristics of computer systems, including processor speed, memory speed, memory capacity, and interconnection data rates, are increasing rapidly. Moreover, they are increasing at different rates. This makes it difficult to design a balanced system that maximizes the performance and utilization of all elements. Thus, computer design increasingly becomes a game of changing the structure or function in one area to compensate for a performance mismatch in another area. We will see this game played out in numerous design decisions throughout the book.
　　A computer system, like any system, consists of an interrelated set of components. The system is best characterized in terms of structure--the way in which components are interconnected, and function--the operation of the individual components. Furthermore, a computer's organization is hierarchic. Each major component can be further described by decomposing it into its major subcomponents and describing their structure and function. For clarity and ease of understanding, this hierarchical organization is described in this book from the top down:
　　· Computer system: Major components are processor, memory, I/O.
　　· Processor: Major components are control unit, registers, ALU, and instruction execution unit.
　　· Control unit: Major components are control memory, microinstruction sequencing logic, and registers.
　　The objective is to present the material in a fashion that keeps new material in a clear context. This should minimize the chance that the reader will get lost and should provide better motivation than a bottom-up approach.
　　Throughout the discussion, aspects of the system are viewed from the points of view of both architecture (those attributes of a system visible to a machine language programmer) and organization (the operational units and their interconnections that realize the architecture).
EXAMPLE SYSTEMS
　　Throughout this book, examples from a number of different machines are used to clarify and reinforce the concepts being presented. Many, but by no means all, of the examples are drawn from two computer families: the Intel Pentium II, and the PowerPC. (The recently introduced Pentium ill is essentially the same as the Pentium II, with an expanded set of multimedia instructions.) These two systems together encompass most of the current computer design trends. The Pentium 11 is essentially a complex instruction set computer (CISC) with a RISC core, while the PowerPC is essentially a reduced-instruction set computer (RISC). Both systems make use of superscalar design principles and both support multiple processor configurations.
PLAN OF THE TEXT
　　The book is organized into five parts:
　　Part One--Overview: This part provides a preview and context for the remainder of the book.
　　Part Two--The computer system: A computer system consists of processor, memory, and I/O modules, plus the interconnections among these major components. With the exception of the processor, which is sufficiently complex to be explored in Part Three, this part examines each of these aspects in turn.
　　Part Three--The central processing unit: The CPU consists of a control unit, registers, the arithmetic and logic unit, the instruction execution unit, and the interconnections among these components. Architectural issues, such as instruction set design and data types, are covered. The part also looks at organizational issues, such as pipelining.
　　Part Four-The control unit: The control unit is that part of the processor that activates the various components of the processor. This part looks at the functioning of the control unit and its implementation using microprogramming.
　　Part Five--Parallel organization: This final part looks at some of the issues involved in multiple processor and vector processing organizations.
　　A more detailed, chapter-by-chapter summary appears at the end of Chapter 1. There is a Web site for this book that provides support for students and instructors.
INTERNET SERVICES FOR INSTRUCTORS AND STUDENTS
　　The site includes links to other relevant sites, transparency masters of figures in the book in PDF (Adobe Acrobat) format, and sign-up information for the book's Internet mailing list. The Web page is at http://www.shore.net/-ws/COA5e.html; see section “Web Site for this Book.” preceding this Preface, for more information An Internet mailing list has been set up so that instructors using this book can exchange information, suggestions and questions with each other and with the author, As soon as typos or other errors are discovered, an errata list for this book will be available at http://www.Shore.net/-ws.
PROJECTS FOR TEACHING COMPUTER ORGANTZATION AND ARCHITECTURE
　　For many instructors, an important component of a computer organization and architecture course is a project or set of projects by which the student gets hands-on experience to reinforce concepts from the text. This book provides an unparalleled degree of support for including a projects component in the course, The instructor’s manual not only includes guidance on how to assign and structure the projects, but also includes a set of suggested projects that covers a broad range of topics from the text:
　　· Research projects: The manual includes series of research assignments that instruct the student to research a particular topic on the Web or in the literature and write a report.
　　· Simulation projects: The manual provides support for the use of the simulation package Simple Scalar, which can be used to explore computer organization and architecture design issues.
　　· Reading/report assignments: The manual includes a list of papers in the literature, one or more for each chapter, that can be assigned for the student to read and then write a short report.
　　See Appendix B for details.
WHAT’S NEW IN THE FIFTH EDITION
　　In the four years since the fourth edition of this book was published, the field as seen continued innovations and improvements. In this new edition, I try to capture these changes while maintaining a broad and comprehensive coverage of the entire field. To begin this process of revision, the fourth edition of this book was extensively reviewed by a number of professors who teach the subject. The result is that in many places, the narrative has been clarified and tightened, and illustrations have been improved. Also, a number of new "field-tested" problems have been added.
　　Beyond these refinements to improve pedagogy and user friendliness, there have been substantive changes throughout the book. Roughly the same chapter organization has been retained, but much of the material has been revised and new material has been added. Some of the most noteworthy changes are the following:
　　· Optical memory: The material on optical memory has been expanded to include magneto-optical memory devices.
　　· Superscalar design: The chapter on superscalar design has been expanded, to include a more detailed discussion and two new examples, the Ultra Sparc II and the MIPS R10000.
　　· Multimedia instruction set: the MMX instruction set, used in the Pentium 11 and Pentium III, is examined.
　　· Predicated execution and speculative loading: This edition features a discussion of these recent concepts, which are central to the design of the new lA64 architecture from Intel and Hewlett-Packard.
　　· SMPs, clusters, and NUMA systems: The chapter on parallel organization has been completely rewritten. It new includes detailed descriptions of and comparisons among symmetric multiprocessors (SMPs), clusters and nonuniform memory access (NUMA) systems.
　　· Expanded instructor support: As mentioned previously, the book now provides extensive support for projects. Support provided by the book Web site has also been expanded.
ACKNOWLEDGMENTS
　　This new edition has benefited from review by a number of people, who gave generously of their time and expertise. The following people reviewed the second edition and made many helpful suggestions: Yew Pen-Chung of University of Minnesota; Yuval Tamir of UCLA; Arthur Werbner; Bina Ramamurthy of SUNY Buffalo; Kitty Niles of University of Minnesota; and Marcus Goncalves of Automation Research Corp. David Lambert of Intel reviewed the Pentium material. The following reviewed portions of the fifth edition manuscript: Jay Kubicky; Mike Albaugh of Atari Games; Tom Callaway of Silicon Graphics; James Stine of Lehigh University; Gabriel Dos Reis of Ecole Normale Superieure de Cachan; and Rick Thomas of Rutgers. Bernd Leppla at IBM Germany helped in my understanding of the IBM mainframe SMP strategy. Professor Cindy Norris of Appalachian State University contributed some homework problems.

CONTENTS
Preface, ix
PART1 OVERVIEW, 1
Chapter 1 Introduction, 3
　　1.1 Organization and Architecture. 5
　　1.2 Structure and Function. 6 1.3 Outline of the Book. 12
　　1.4 Internet and Web Resources. 15
Chapter 2 Computer Evolution and Performance, 17
　　2.1 A Brief History of Computers, 19
　　2.2 Designing for Performance, 39
　　2.3 Pentium and PowerPC Evolution 43
　　2.4 Recommended Reading and Web Sites, 46
　　2.5 Problems, 47
PART II THE COMPUTER SYSTEM, 49
Chapter 3 System Buses, 51
　　3.l Computer Components, 53
　　3.2 Computer Function, 56
　　3.3 Interconnection Structures, 69
　　3.4 Bus interconnection, 71
　　3.5 PCI, 80
　　3.6 Recommended Reading and Web Sites, 89 3.7 Problems, 90
　　Appendix 3A: Timing Diagrams, 92
Chapter 4 Internal Memory, 95
　　4.1 Computer Memory System Overview, 97
　　4.2 Semiconductor Main Memory, 103
　　4.3 Cache Memory, 117
　　4.4 Pentium II and Power PC Cache Organizations132
　　4.5 Advanced DRAM Organization, 137
　　4.6 Recommended Reading and Web Sites, 142
　　4.7 Problems, 143
　　Appendix 4A: Performance Characteristics of Two-Level Memories, 145
Chapter 5 External Memory, 153
　　5.1 Magnetic Disk, 155
　　5.2 RAID, 163
　　5.3 Optical Memory, 172
　　5.4 Magnetic Tape, 177
　　5.5 Recommended Reading and Web Sites, 178
　　5.6 Problems, 179
Chapter 6 Input/Output, 181
　　6.1 External Devices, 184
　　6.2 I/O Modules, 188
　　6.3 Programmed I/O, 191
　　6.4 Interrupt-Driven I/O, 195
　　6.5 Direct Memory Access, 203
　　6.6 I/O Channels and Processors, 207
　　6.7 The External interface: SCSI and FireWire, 209
　　6.8 Recommended Reading and Web Sites, 223
　　6.9 Problems, 224
Chapter 7 Operating System Support, 227
　　7.1 Operating System Overview, 229
　　7.2 Scheduling, 241
　　7.3 Memory Management, 247
　　7.4 Pentium II and Power PC Memory Management,259
　　7.5 Recommended Reading and Web Sites, 268
　　7.6 Problems, 269
PART III THE CENTRAL PROCESSING UNIT,271
Chapter 8 Computer Arithmetic, 273
　　8.1 The Arithmetic and Logic Unit (ALU), 275
　　8.2 Integer Representation, 276
　　8.3 Integer Arithmetic, 282
　　8.4 Floating-Point Representation, 298
　　8.5 Floating-Point Arithmetic, 305
　　8.6 Recommended Reading and Web Sites, 314
　　8.7 Problems, 315
　　Appendix 8A: Number Systems, 317
Chapter 9 Instruction Sets: Characteristics and Functions, 323
　　9.1 Machine Instruction Characteristics, 325
　　9.2 Types of Operands. 331
　　9.3 Pentium II and PowerPC Data Types, 333
　　9.4 Types of Operations. 336
　　9.5 Pentium II and PowerPC Operation Types, 349
　　9.6 Assembly Language, 358
　　9.7 Recommended Reading, 360
　　9.8 Problems, 360
　　Appendix 9A: Stacks, 364
　　Appendix 9B f Little-, Big-, and Bi-Endian, 368
Chapter 10 Instruction Sets: Addressing Modes and Formats, 373
　　10.1 Addressing, 375
　　10.2 Pentium and PowerPC Addressing Modes, 382
　　10.3 Instruction Formats. 388.
　　10.4 Pentium and PowerPC Instruction Formats, 397;
　　10.5 Recommended Reading, 402
　　10.6 Problems, 402
Chapter 11 CPU Structure and Function, 405
　　11.1 Processor Organization, 407
　　11.2 Register Organization, 409
　　11.3 The instruction Cycle, 414
　　11.4 Instruction Pipelining, 419
　　11.5 The Pentium Processor,434
　　11.6 The Pentium Processor,434
　　11.7 Recommended Reading,450
　　11.8 Problems, 451
Chapter 12 Reduced instruction Set Computers, 455
　　12.1 Instruction Execution Characteristics,458
　　12.2 The Use of a Large Register File, 462
　　12.3 Compiler-Based Register Optimization, 467
　　12.4 Reduced Instruction Set Architecture. 469
　　12.5 RISC Pipelining, 476
　　12.6 MIPS R4000, 480
　　12.7 SPARC, 488
　　12.8 The RISC versus CISC Controversy, 494
　　12.9 Recommended Reading, 495
　　12.10 Problems, 496
Chapter 13 Instruction-Level Parallelism and Superscalar Processors, 499
　　13.1 Overview, 501
　　13.2 Design issues, 506
　　13.3 Pentium II,515
　　13.4 PowerPC,521
　　13.5 MIPS R10000,529
　　13.6 UltraSPARC-II 531
　　13.7 IA-64Merced,534
　　13.8 Recommended Reading,545
　　13.9 Problems,546
PART IV THE CONTROI,UNIT, 551
Chapter 14 Control Unit Operation,553
　　14.1 Micro-operations,555
　　14.2 Control o f the Processor,561
　　14.3 Hardwired Implementation,573
　　14.4 Recommended Reading,575
　　14.5 Problems,576
Chapter 15 Microprogrammed Control,577
　　15.1 Basic Concepts,579
　　15.2 Microinstruction Sequencing,588
　　15.3 Microinstruction Execution,593
　　15.4 TI8800,605
　　15.5 Applications of Microprogramminmg,615
　　15.6 Recommended Reading,616
　　15.7 Problems,617
PART V PARALLEL ORGANIZATION, 619
Chapter 16 Parallel Processing, 621
　　16.1 Multiple Processor Organizations, 623
　　16.2 Symmetric Multiprocessors, 625
　　16.3 Cache Coherence and the MESI Protocol, 635
　　16.4 Clusters, 642
　　16.5 Nonuniform Memory Access, 646
　　16.6 Vector Computation, 650
　　16.7 Recommended Reading, 663
　　16.8 Problems, 664
Appendix A Digital Logic, 669
　　A.1 Boolean Algebra, 670
　　A.2 Gates, 672
　　A.3 Combinational Circuits, 675
　　A.4 Sequential Circuits. 696
　　A.5 Problems, 707
Appendix B Projects for Teaching Computer Organization and Architecture, 709
　　B.1 Research Projects, 710
　　B.2 Simulation Projects, 710
　　B.3 Reading/Report Assignments, 712
Glossary, 713
References, 725
Index, 739